全職
09:00~18:00

桃園市桃園區

1. Responsible for schematics capture, layout checking, CPLD coding(Verilog/VHDL) , BOM generating, and debugging and testing of server mother boards/add-on cards/backplane products.
2.Collaborate with layout engineers, validation engineers, software engineers, firmware engineers, power engineers and other teams to discover and solve any issues of designs in early stage to ensure and enhance the quality of the products.
3.Accomplish the products to conform to engineering specifications , customer performance expectations.
4. Perform other duties as assigned.

月薪 35000～

大學(含)以上，電機電子相關

10
(v) 適用外僑生